arXiv cs.AI· Je Yang, Ivan Lobov, Thomas Karpati·· 12 小时前AI 评分31
Back-to-the-Future（BTTF）：为芯片设计验证的智能体系统重构 EDA 基础设施
Back to the Future: Rethinking EDA Infrastructure for Agentic Systems in Chip Design Verification
AI 导读
研究团队提出端到端智能体框架 Back-to-the-Future（BTTF），将非结构化仿真数据蒸馏为规范化 SQLite 关系数据库，并用多智能体编排引擎把自然语言验证查询转为 schema-aware SQL，同时关联信号异常与版本化 RTL 仓库。
正文 · 原文
Abstract:The unprecedented computational scale of modern artificial intelligence depends on complex, multi-billion-transistor Systems-on-Chip, yet the workflows that verify these chips remain stubbornly manual. Although Large Language Models (LLMs) have made rapid inroads into Electronic Design Automation (EDA), approximately 74.6% of existing studies target static Register-Transfer Level (RTL) code generation, leaving post-simulation verification and interactive waveform debugging largely untouched. We introduce Back-to-the-Future (BTTF), an end-to-end agentic framework that closes this infrastructural gap. BTTF distills massive, unstructured simulation dumps into a normalized relational SQLite database and couples it with a collaborative multi-agent orchestration engine that translates natural-language verification queries into schema-aware SQL while correlating signal anomalies with versioned RTL repositories. Across a 150-query benchmark, BTTF attains 95.33% execution accuracy, charting a practical path toward autonomous EDA verification.
| Comments: | 40th NeurIPS'26 Workshop AI for Chip Design |
| Subjects: | Artificial Intelligence (cs.AI) |
| Cite as: | arXiv:2610.06790 [cs.AI] |
| (or arXiv:2610.06790v2 [cs.AI] for this version) | |
| https://doi.org/10.48550/arXiv.2610.06790 arXiv-issued DOI via DataCite |
Submission history
From: Je Yang [view email]
[v1]
Mon, 5 Oct 2026 17:48:14 UTC (394 KB)
[v2]
Thu, 22 Oct 2026 20:12:37 UTC (394 KB)
来源：arXiv cs.AI · arxiv.org